Brendan Ang

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Instruction Set Architecture

Last updated Nov 8, 2022 Edit Source

# Instruction Set Architecture (ISA)

A set of specifications a programmer must know to write correct and efficient programs for a specific machine

# RISC vs CISC

RISC: Reduced Instruction Set Architecture CISC: Complex Instruction Set Architecture

# ARM ISA

Advanced RISC Machine (ARM)

# Register specification

# Register File

A register file is a set of registers that can be read and written by supplying a register number. This is done using to choose source registers and using a to select a destination register.

# Memory organization

# Instruction memory

# Data memory

# Instructions Format

Based on the system we can design a set of computer Instructions.

# Addressing Modes

# Practice Problems

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ADDI X2, X3, #101 ;save loop termination index
loop: 
	LDUR X4, [X11, #0] ;x4 = b[i]
	ADDI X11, X11, #8 ;x11 = x11 + 8
	ADD X4, X4, X1 ;x4 = b[i] + c
	STUR X4, X10, #8 ;a[i] = x4
	ADDI X10, X10, #8 ;a[i] = a[i+1]
	SUBI X2, X2, 1 ;x2 = x2-1
	CBNZ X2, loop
exit END

ii. 1 is run once: 1 2 -> 8 is run 101 times = 1 + 707 = 708 iii. Line 1 and 4 are memory references, each done 101 times: 202 references.